• DocumentCode
    2949093
  • Title

    High speed SDRAM interface circuit

  • Author

    Xin, Yuan ; Wei, Li ; Qing, Li ; Ping, Xiao ; Jingyu, Hu ; Lianxing, Yang

  • Author_Institution
    State Key Lab., Fudan Univ., Shanghai, China
  • fYear
    1996
  • fDate
    21-24 Oct 1996
  • Firstpage
    123
  • Lastpage
    126
  • Abstract
    SDRAM is a kind of DRAM with synchronous clock. It has wide applications in the field of image processing. In this paper, we introduce an interface circuit of high speed SDRAM. The speed of the circuit can be 50 MHz. We have verified the circuit by FPGA (Xilinx 3195A-2 PQ208)
  • Keywords
    DRAM chips; 50 MHz; DRAM; FPGA; Xilinx 3195A-2 PQ208; high speed SDRAM interface circuit; image processing; synchronous clock; Application specific integrated circuits; Clocks; Content addressable storage; Delay; Field programmable gate arrays; Hardware; Image processing; Random access memory; Registers; SDRAM;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 1996., 2nd International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    7-5439-0940-5
  • Type

    conf

  • DOI
    10.1109/ICASIC.1996.562767
  • Filename
    562767
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2949093