Title :
FPGA design and implementation of Digital Up-Converter using quadrature oscillator
Author :
de Figueiredo, Felipe A. P. ; Filho, Jose Arnaldo B. ; Lenzi, Karlo G.
Author_Institution :
DRC (Convergent Networks Dept.), CPqD (R&D Center on Telecommun.), Campinas, Brazil
Abstract :
In this paper we design and implement a complex Digital Up-Converter (DUC) using a Xilinx Virtex6 FPGA. All the steps necessary to build such circuits are thoroughly described and some valuable hints on how to overcome problems during the design time are presented. We introduce a new approach for oscillator circuits, which are an important part of any DUC design. Such oscillator approach is stable, clean, accurate and easily tunable. It is also RAM memory efficient, consuming no block RAM and a small amount of logic.
Keywords :
digital-analogue conversion; field programmable gate arrays; logic design; oscillators; DUC design; FPGA design; RAM memory efficient; Xilinx Virtex6; digital up-converter; quadrature oscillator; Complex Multiplier; Digital Up Converter (DUC); Field-Programmable Gate Array (FPGA); Polyphase filter; Quadarture Oscillator; Virtex6;
Conference_Titel :
Applied Electrical Engineering and Computing Technologies (AEECT), 2013 IEEE Jordan Conference on
Conference_Location :
Amman
Print_ISBN :
978-1-4799-2305-2
DOI :
10.1109/AEECT.2013.6716423
