DocumentCode
2950291
Title
Characterization of Direct Cache Access on multi-core systems and 10GbE
Author
Kumar, Amit ; Huggahalli, Ram ; Makineni, Srihari
Author_Institution
Intel Corp., Santa Clara, CA
fYear
2009
fDate
14-18 Feb. 2009
Firstpage
341
Lastpage
352
Abstract
10 GbE connectivity is expected to be a standard feature of server platforms in the near future. Among the numerous methods and features proposed to improve network performance of such platforms is direct cache access (DCA) to route incoming I/O to CPU caches directly. While this feature has been shown to be promising, there can be significant challenges when dealing with high rates of traffic in a multiprocessor and multi-core environment. In this paper, we focus on two practical considerations with DCA. In the first case, we show that the performance benefit from DCA can be limited when network traffic processing rate cannot match the I/O rate. In the second case, we show that affinitizing both stack and application contexts to cores that share a cache is critical. With proper distribution and affinity, we show that a standard Linux network stack runs 32% faster for 2 KB to 64 KB I/O sizes.
Keywords
Linux; cache storage; shared memory systems; telecommunication network routing; telecommunication traffic; CPU cache; I/O routing; Linux network; direct cache access; multicore system; network performance; network traffic; server platform; storage capacity 10 Gbit; Access protocols; Control systems; Kernel; Microarchitecture; Microprocessors; Network servers; Processor scheduling; Technological innovation; Telecommunication traffic; Virtual prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture, 2009. HPCA 2009. IEEE 15th International Symposium on
Conference_Location
Raleigh, NC
ISSN
1530-0897
Print_ISBN
978-1-4244-2932-5
Type
conf
DOI
10.1109/HPCA.2009.4798271
Filename
4798271
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