DocumentCode
2950906
Title
Automatic tuning circuit for Gm-C filters
Author
Kim, Young-Ho ; Yu, Hyun-Kyu
Author_Institution
Dept. of SoC Design Res., Electron. & Telecommun. Res. Inst. (ETRI), Daejeon
fYear
2005
fDate
11-14 Dec. 2005
Firstpage
1
Lastpage
4
Abstract
This paper presents a CMOS on-chip automatic tuning circuit using phase lock loop (PLL) technique for continuous-time Gm-C filters. In the tuning circuit, to achieve the maximum tuning accuracy, the new VCO architecture that generates precisely fully differential clock swings and keeps the absolute oscillation in all operating condition was proposed. Measured results show that the designed automatic tuning circuit is suitable for the continuous-time Gm-C filter. The verified system is fabricated in a 0.18 mum CMOS technology and consumes 2.78 mW at a 1.8V supply voltage.
Keywords
CMOS integrated circuits; circuit tuning; continuous time filters; phase locked loops; voltage-controlled oscillators; CMOS on-chip automatic tuning circuit; continuous-time Gm-C filters; phase lock loop; power 2.78 mW; size 0.18 mum; voltage 1.8 V; voltage-controlled oscillators; Circuit optimization; Cutoff frequency; Integrated circuit measurements; Low pass filters; Master-slave; Phase locked loops; Transconductors; Tuning; Voltage; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on
Conference_Location
Gammarth
Print_ISBN
978-9972-61-100-1
Electronic_ISBN
978-9972-61-100-1
Type
conf
DOI
10.1109/ICECS.2005.4633479
Filename
4633479
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