DocumentCode :
2951078
Title :
An efficient hybrid cache coherence protocol for shared memory multiprocessors
Author :
Chang, Yeimkuan ; Bhuyan, Lasimi N.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
Volume :
1
fYear :
1996
fDate :
12-16 Aug 1996
Firstpage :
172
Abstract :
This paper presents a new tree-based cache coherence protocol which is a hybrid of the limited directory and the linked list schemes. By utilizing a limited number of pointers in the directory, the proposed protocol connects the nodes caching a shared block in a tree fashion. In addition to the low communication overhead, the proposed scheme also contains the advantages of the existing bit-map and tree-based linked list protocols, namely, scalable memory requirement and logarithmic invalidation latency. We evaluate the performance of our protocol by running four applications on an execution-driven simulator. Our simulation results show that the performance of the proposed protocol is very close to that of the full-map directory protocol
Keywords :
memory protocols; shared memory systems; bit-map; directory; execution-driven simulator; full-map directory protocol; hybrid cache coherence protocol; logarithmic invalidation latency; low communication overhead; pointers; scalable memory requirement; shared memory multiprocessors; tree-based cache coherence protocol; tree-based linked list protocols; Broadcasting; Delay; Electronic mail; Ink; Joining processes; Parallel processing; Protocols; Read-write memory; Telecommunication traffic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 1996. Vol.3. Software., Proceedings of the 1996 International Conference on
Conference_Location :
Ithaca, NY
ISSN :
0190-3918
Print_ISBN :
0-8186-7623-X
Type :
conf
DOI :
10.1109/ICPP.1996.537158
Filename :
537158
Link To Document :
بازگشت