Embedded software implementation of an adaptive baseband predistorter

Author

Rebai, Chiheb ; Zaoui, Hassen ; Ghazel, Adel ; Nasr, Haykel Ben ; Boumaiza, Slim ; Gannouchi, Fadhel

Author_Institution

MEDIATRON Lab., Ecole Super. de Commun. (SUP´´COM), Tunis

fYear

2005

fDate

11-14 Dec. 2005

Firstpage

1

Lastpage

4

Abstract

This paper is intended to present an adaptive digital baseband predistortion (DPD) method for power amplifier linearization using an hybrid DSP/FPGA based architecture. The DPD reference scheme is designed around two processing stages. The first of them is the real time fast loop based on a Look Up Table (LUT) and performed by a Field Programmable Gate Array (FPGA). The second stage, being at the center of interest of this article, is the adaptive loop designed as embedded and reconfigurable software in a Digital Signal Processor (DSP).

Keywords

digital signal processing chips; embedded systems; field programmable gate arrays; power amplifiers; table lookup; DPD method; LUT; adaptive digital baseband predistorter; digital signal processor; embedded software implementation; field programmable gate array; hybrid DSP-FPGA based architecture; look up table; power amplifier linearization; real time fast loop; reconfigurable software; Baseband; Computer architecture; Digital signal processing; Embedded software; Field programmable gate arrays; Power amplifiers; Predistortion; Process design; Signal design; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on

Conference_Location

Gammarth

Print_ISBN

978-9972-61-100-1

Electronic_ISBN

978-9972-61-100-1

Type

conf

DOI

10.1109/ICECS.2005.4633489

Filename

4633489