DocumentCode :
2951106
Title :
FPGA bulding blocks for an hybrid base band digital predistorter suitable for 3G poweramplifiers
Author :
Rebai, Chiheb ; Labiadh, Salman ; Grati, Khaled ; Ghazel, Adel ; Boumaiza, Slim ; Ghanouchi, Fadhel
Author_Institution :
MEDIATRON Lab., Ecole Super. de Commun., Tunis
fYear :
2005
fDate :
11-14 Dec. 2005
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a new implementation of the adaptive digital base band predistortion (DPD) system in order to compensate high power amplifier (HPA) nonlinearities used in third generation systems (WCDMA). The proposed implementation of the predistorter architecture is based on FPGA-based look-up table (LUT) which is filled up by performing an adaptive algorithm on a DSP. In this work the attention is focused in the FPGA design considerations.
Keywords :
3G mobile communication; code division multiple access; field programmable gate arrays; logic design; power amplifiers; radiofrequency amplifiers; table lookup; 3G power-amplifier; FPGA-based look-up table; WCDMA; adaptive digital base band predistortion system; high power amplifier nonlinearities; hybrid base band digital predistorter; third generation system; Digital signal processing; Field programmable gate arrays; Laboratories; Multiaccess communication; Nonlinear distortion; Power amplifiers; Power generation; Predistortion; Table lookup; Virtual manufacturing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on
Conference_Location :
Gammarth
Print_ISBN :
978-9972-61-100-1
Electronic_ISBN :
978-9972-61-100-1
Type :
conf
DOI :
10.1109/ICECS.2005.4633490
Filename :
4633490
Link To Document :
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