A spurious-free delta-sigma DAC using rotated data weighted averaging

Author

Radke, Russ ; Eshraghi, Aria ; Fiez, Terri S.

Author_Institution

LSI Logic, Fort Collins, CO, USA

fYear

1999

fDate

1999

Firstpage

125

Lastpage

128

Abstract

A new dynamic element matching (DEM) algorithm, referred to as rotated data weighted averaging (RDWA), is implemented in a third-order three-bit delta-sigma DAC with 64 times oversampling and a conversion bandwidth of 25 kHz. The systematic and random errors are considered in the design of the 14-bit linear converter. The 2 μm CMOS prototype was designed to test the performance of the DAC without DEM, with data weighted averaging (DWA), and with RDWA. The results show that the new RDWA algorithm is capable of achieving first-order noise shaping while eliminating the signal-dependent harmonic distortion even for DAC component mismatches as large as 15%

Keywords

CMOS integrated circuits; delta-sigma modulation; harmonic distortion; 14 bit; 2 micron; 25 kHz; D/A convertor; delta-sigma DAC; distortion elimination; dynamic element matching algorithm; first-order noise shaping; linear converter; oversampling; random errors; rotated data weighted averaging; signal-dependent harmonic distortion; spurious-free DAC; systematic error; third-order DAC; Baseband; Delta modulation; Digital filters; Frequency conversion; Large scale integration; Logic; Matched filters; Noise shaping; Quantization; Signal resolution;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777257

Filename

777257