DocumentCode :
2951626
Title :
Comparative simulation of TriGate and FinFET on SOI: Evaluating a multiple threshold voltage strategy on triple gate devices
Author :
Coquand, R. ; Jaud, M.-A. ; Rozeau, O. ; Idrissi-Eloudrhiri, A. ; Martinie, S. ; Triozon, Francois ; Pons, N. ; Barraud, S. ; Monfray, Stephane ; Boeuf, F. ; Ghibaudo, Gerard ; Faynot, O.
Author_Institution :
STMicroelectron., Crolles, France
fYear :
2013
fDate :
7-10 Oct. 2013
Firstpage :
1
Lastpage :
2
Abstract :
This study highlights the behavior of triple gate SOI transistors on thin BOx. Simulated in 3D TCAD, TriGate and FinFET structures are evaluated with scaled EOT of 0.82nm, proposed for 10nm technology node. Due to a good compromise of channel control by the gate and back-biasing through ultra-thin BOx, TriGate FETs can combine excellent electrostatics with sufficient body-factor (BF), unlike FinFETs. To be fully efficient, a multi-Vt strategy by back-biasing technique on TriGate needs no BOx recess and ultra-thin BOx of 10nm. In these conditions and at gate length L=15nm, back-biasing on TriGate could allow ×1.3 ION and /16 IOFF performance.
Keywords :
MOSFET; electrostatics; semiconductor device models; silicon-on-insulator; technology CAD (electronics); 3D TCAD; FinFET; TriGate; back-biasing; channel control; electrostatics; multiple threshold voltage strategy; size 0.82 nm; size 10 nm; triple gate SOI transistors; triple gate devices; ultrathin BOx; Couplings; Electrostatics; FinFETs; Logic gates; Substrates; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
Conference_Location :
Monterey, CA
Type :
conf
DOI :
10.1109/S3S.2013.6716523
Filename :
6716523
Link To Document :
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