Title :
An SDH STM-1 termination IC
Author :
Xiaoru, Zhang ; Lieguang, Zeng
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
Abstract :
The STM-1 termination IC receives and transmits Synchronous Digital Hierarchy (SDH) STM-1 signals. In addition to STM-1 frame generation and frame alignment, the chip parallelly scrambles and descrambles the STM-1 signal, provides pointer generation and interpretation, and performs payload insertion and recovery. Section and path overheads are extracted and inserted, alarm signals are detected and reported, and performance monitoring at various layers is also performed. Designed as a basic building block of SDH equipment, the chip fully complies with the SDH transport network standards. After an FPGA prototype has been verified in board environment, it is converted to CMOS gate array
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; digital communication; digital signal processing chips; field programmable gate arrays; multiplexing equipment; synchronous digital hierarchy; CMOS gate array; FPGA prototype; SDH STM-1 termination IC; STM-1 frame generation; STM-1 signals; alarm signal detection; descrambling; frame alignment; payload insertion; payload recovery; performance monitoring; pointer generation; pointer interpretation; scrambling; synchronous digital hierarchy; Data mining; Digital integrated circuits; Monitoring; Payloads; SONET; Signal detection; Signal generators; Synchronous digital hierarchy; Timing; Virtual colonoscopy;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562781
