A new LSI bonding technology `micron bump bonding technology´

Author

Hatada, Kenzo ; Fujimoto, Hiroaki

Author_Institution

Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

fYear

1989

fDate

22-24 May 1989

Firstpage

45

Lastpage

49

Abstract

The micron-bump bonding method for LSI chip bonding, which allows micron-order direct bonding between the LSI electrode and an electrode on the circuit substrate, is discussed. The shrinkage stress generated in light-setting insulation resin is utilized to apply a compressive force to the LSI chip, pressing it against the electrodes provided on a substrate. LSI chips having an interelectrode spacing of 10 μm and 2320 electrodes was successfully gang bonded face down with high reliability

Keywords

VLSI; encapsulation; flip-chip devices; lead bonding; packaging; 10 micron; LSI bonding technology; LSI chip bonding; LSI electrode; UV curing resin; VLSI; circuit substrate electrode; compressive force; face down gang bonding; gang bonded face down; high reliability; interelectrode spacing; light-setting insulation resin; micron bump bonding technology; micron-order direct bonding; shrinkage stress; Bonding; Circuits; Costs; Electrodes; Insulation; Large scale integration; Pins; Resins; Substrates; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components Conference, 1989. Proceedings., 39th

Conference_Location

Houston, TX

Type

conf

DOI

10.1109/ECC.1989.77727

Filename

77727