A charge redistribution SAR ADC for a pressure correction ASIC

A charge redistribution successive approximation register analog-to-digital converter (SAR ADC) targeted for use in a pressure correction ASIC is presented. The ASIC finds a large field of applications in automotive industry, where aggressive conditions of operation, such as big temperature and supply variations, are met. It is therefore necessary for the ADC to ensure good linearity with respect to temperature and supply in the entire interval of operation. This paper describes the design and implementation of an 11-bits, 25 KS/s SAR ADC to meet the unique requirements of digitization of the ASIC. The reported ADC consumes 1 mW at 5 Volts supply and 1 MHz clock. It is designed in the ELMOS 0.8 mum high voltage BiCMOS technology.