Hardware emulation of Quantum Fourier Transform

Author

Rivera-Miranda, José F. ; Caicedo-Beltrán, Álvaro J. ; Valencia-Payán, Juan D. ; Espinosa-Duran, John M. ; Velasco-Medina, Jaime

Author_Institution

Bionanoelectronics Res. Group, Univ. del Valle, Cali, Colombia

fYear

2011

fDate

23-25 Feb. 2011

Firstpage

1

Lastpage

4

Abstract

The Quantum Fourier Transform (QFT) has an important role in some of the most interesting and useful quantum algorithms, such as those for period finding, order finding, phase estimation and factoring. Most of the research carried out on the QFT has been developed using software simulators, however these do not emulate efficiently the quantum parallelism present in the quantum algorithms. Addressing this problem, this paper presents the hardware design of an emulator for computing the QFT using FPGAs. This emulator was designed considering a modular philosophy and it is expected to be a powerful tool to evaluate quantum algorithms that include a many-qubit QFT.

Keywords

Fourier transforms; field programmable gate arrays; quantum computing; FPGA; hardware emulation; modular philosophy; order finding; period finding; phase estimation; quantum Fourier transform; quantum algorithm; quantum parallelism; software simulator; Algorithm design and analysis; Digital signal processing; Field programmable gate arrays; Hardware; Logic gates; Pipelines; Quantum computing; Quantum Fourier Transform; hardware-based quantum computing emulator; quantum algorithm; quantum circuit; quantum gate;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (LASCAS), 2011 IEEE Second Latin American Symposium on

Conference_Location

Bogata

Print_ISBN

978-1-4244-9484-2

Type

conf

DOI

10.1109/LASCAS.2011.5750269

Filename

5750269