Title :
A self-timed, fully-parallel content addressable queue for switching applications
Author :
Podaima, Jason ; Gulak, Glenn
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
A self-timed, fully-parallel content addressable queue (CAQ) memory replaces traditional means of implementing pointer-based queuing in switching systems. A 16.5 Kb CAQ test device implemented in 0.8 μm CMOS, asynchronously performs four memory operations per clock cycle. Test results indicate a maximum operating frequency of 40 MHz
Keywords :
CMOS memory circuits; asynchronous circuits; content-addressable storage; parallel memories; telecommunication switching; timing; 0.8 micron; 16 Kbit; 40 MHz; CAM array; CMOS IC; content addressable queue memory; fully-parallel memory; self-timed memory; switching applications; Application software; CADCAM; Clocks; Computer aided manufacturing; Educational institutions; Frequency; Switches; Switching systems; Testing; Traffic control;
Conference_Titel :
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5443-5
DOI :
10.1109/CICC.1999.777282
