Title :
PAC DSP Core and Application Processors
Author :
Chang, David Chih-Wei ; Liao, I-Tao ; Lee, Jenq-Kuen ; Chen, Wen-Feng ; Tseng, Shau-Yin ; Jen, Chein-Wei
Author_Institution :
SoC Technol. Center, Ind. Technol. Res. Inst., Hsinchu
Abstract :
This paper provides an overview of the parallel architecture core (PAC) project led by SoC Technology Center of Industrial Technology Research Institute (STC/ITRI) in Taiwan. The background of PAC project, a brief introduction to PAC core technologies, PAC SoC development suite, PAC benchmarks, and applications are presented. The main objective of the PAC development plan is to enhance industrial development competitiveness in the core technology related to key components, especially for portable multimedia applications
Keywords :
digital signal processing chips; parallel architectures; system-on-chip; DSP core; PAC; SoC development; application processor; benchmark; industrial development; parallel architecture core project; portable multimedia application; Assembly; Consumer electronics; Digital signal processing; Digital signal processing chips; Energy consumption; Energy management; Kernel; Multimedia systems; Programming; VLIW;
Conference_Titel :
Multimedia and Expo, 2006 IEEE International Conference on
Conference_Location :
Toronto, Ont.
Print_ISBN :
1-4244-0366-7
Electronic_ISBN :
1-4244-0367-7
DOI :
10.1109/ICME.2006.262455
