DocumentCode
2952099
Title
Approaching Fingerprint Image Enhancement through Reconfigurable Hardware Accelerators
Author
Fons, Francisco ; Fons, Mariano ; Cantó, Enrique
Author_Institution
Electr. i Autom. Univ. Rovira i Virgili, Tarragona
fYear
2007
fDate
3-5 Oct. 2007
Firstpage
1
Lastpage
6
Abstract
In this paper, an efficient hardware-software architecture is proposed to cope with the implementation of an automatic fingerprint recognition system. A flexible field programmable gate array (FPGA) device lets develop the image processing application so that the same logic substrate is reconfigured and reused by several custom coprocessors during the different operation stages of the sequential biometric algorithm. The results reached with this technology reveal that a middle-range reconfigurable FPGA faces both real-time and parallel compute-intensive demands of the fingerprint image enhancement process.
Keywords
digital signal processing chips; field programmable gate arrays; fingerprint identification; hardware-software codesign; image enhancement; reconfigurable architectures; system-on-chip; automatic fingerprint recognition system; field programmable gate array device; fingerprint image enhancement; hardware-software architecture; hardware-software co-design; reconfigurable hardware accelerator; sequential biometric algorithm; system-on-chip; Acceleration; Coprocessors; Field programmable gate arrays; Fingerprint recognition; Hardware; Image matching; Image processing; Logic devices; Programmable logic arrays; Reconfigurable logic; Hardware-software co-design; image processing; reconfigurable computing; system-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing, 2007. WISP 2007. IEEE International Symposium on
Conference_Location
Alcala de Henares
Print_ISBN
978-1-4244-0830-6
Electronic_ISBN
978-1-4244-0830-6
Type
conf
DOI
10.1109/WISP.2007.4447553
Filename
4447553
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