DocumentCode
2952608
Title
A new method for reuse-driven design of digital circuits
Author
Heuser, Olaf ; Fiedler, Horst-Lothar
Author_Institution
Fraunhofer-Inst. of Microelectron Circuits & Syst., Duisburg, Germany
fYear
1999
fDate
1999
Firstpage
407
Lastpage
410
Abstract
This paper describes a method for the design of digital systems that emphasizes a bottom-up procedure and reuse of existing components. Our method is based on an object-oriented hierarchy of classes describing the structure of components. Descriptions of all classes in a new language, HDLC++, are transformed into RTL-Verilog code for the complete system
Keywords
hardware description languages; logic CAD; object-oriented methods; software reusability; HDLC++; RTL-Verilog code; bottom-up procedure; digital circuits; object-oriented hierarchy; reuse-driven design; Circuit synthesis; Control systems; Design methodology; Digital circuits; Digital systems; Hardware design languages; Integrated circuit synthesis; Microelectronics; Object oriented modeling; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location
San Diego, CA
Print_ISBN
0-7803-5443-5
Type
conf
DOI
10.1109/CICC.1999.777314
Filename
777314
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