Implementation of a GMSK communication system on FPGA

Author

Lee, Juan Felipe Medina ; Montenegro, Juan Felipe Patarroyo ; Morales, Catalina Munoz ; Parrado, Alexander López ; Gutierrez, Juan José Giraldo

Author_Institution

GDSPROC, Univ. del Quindio, Armenia, Colombia

fYear

2011

fDate

23-25 Feb. 2011

Firstpage

1

Lastpage

4

Abstract

This paper presents the design and implementation of a complete communication system using the GMSK modulation scheme. The hardware is described in VHDL and implemented on Altera FPGA. Additionally, each block used to perform the implementation is completely described accomplishing all the requirements of this kind of modulation. Mueller & Müller algorithm is also performed to ensure timing synchronization between transmitter and receiver. This communication system was developed with educational purposes.

Keywords

field programmable gate arrays; hardware description languages; minimum shift keying; receivers; transmitters; Altera FPGA; Gaussian minimum shift keying modulation communication system; Mueller & Müller algorithm; VHDL; receiver; timing synchronization; transmitter; Demodulation; Field programmable gate arrays; Finite impulse response filter; Frequency modulation; Synchronization; FPGA; GMSK; communication system; digital modulation; timing synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (LASCAS), 2011 IEEE Second Latin American Symposium on

Conference_Location

Bogata

Print_ISBN

978-1-4244-9484-2

Type

conf

DOI

10.1109/LASCAS.2011.5750316

Filename

5750316