Title :
Power supply noise in future IC´s: a crystal ball reading
Author_Institution :
Lucent Technol., AT&T Bell Labs., Holmdel, NJ
Abstract :
di/dt noise is becoming more severe as technology scales, resulting in great need for noise suppression techniques. Several techniques are in use today, but only two techniques will remain effective in the future as shown by scaling theory analysis. Resonance is a related issue that will also be analyzed
Keywords :
VLSI; application specific integrated circuits; computer power supplies; digital integrated circuits; integrated circuit design; integrated circuit noise; microprocessor chips; timing jitter; ASIC; PLL jitter; VLSI; decoupling capacitance; di/dt noise; dynamic logic; future ICs; high-end circuits; large digital circuits; logic delay failure; noise suppression; pipelined circuits; power supply noise; resonance; scaling theory analysis; switching output buffers; Bonding; Capacitance; Circuit noise; Delay; Integrated circuit noise; Noise generators; Noise reduction; Noise shaping; Power supplies; Switching circuits;
Conference_Titel :
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5443-5
DOI :
10.1109/CICC.1999.777324
