A new Block-XOR precomputation-based CAM design for low-power embedded system

In this paper, we propose a new precomputation-based content addressable memory (PB-CAM) structure for saving content addressable memory access power. Our approach is based on the PB-CAM. Although the PB-CAM can eliminate the comparison operations to reduce power consumption by precomputation, it suffers from that the ones count approach limits the reduction amount of comparison operations. Therefore, we devise a block-XOR approach to improve the efficiency of PB-CAM. In the experiment, we estimate the power by Synopsys Prime-Power. Compared to, the experimental results show that our approach achieves 89% reduction of the power-delay product in parameter extractor. In addition, it results in 21 % reduction in total cache power consumption.