470 MHz digital filter on delta-sigma modulated signals

Author

Li, Silas ; Lewis, David

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

fYear

1999

fDate

1999

Firstpage

553

Lastpage

556

Abstract

This paper describes a digital filter operating on Δ-Σ modulated signals. Using a simple processor core comprising an ALU and multiple registers, controlled by an instruction ROM, this circuit operates at 470 MHz in 0.8 μm CMOS. Novel features include partial carry propagation, which reduces circuit delay to that of a single carry-save adder, but results in inexact quantization. On-chip clocking synchronizes low-speed I/O signals to the internal 470 MHz clock. All-N TSPC and conventional TSPC result in a high clock speed of 470 MHz in a 0.8 μm process

Keywords

CMOS digital integrated circuits; application specific integrated circuits; delta-sigma modulation; digital filters; digital signal processing chips; high-speed integrated circuits; synchronisation; timing; Δ-Σ modulated signals; 0.8 micron; 470 MHz; ALU; CMOS IC; carry-save adder; delta-sigma modulated signals; digital filter; instruction ROM; multiple registers; onchip clocking; partial carry propagation; processor core; Adders; CMOS process; Circuits; Clocks; Delta modulation; Digital filters; Digital modulation; Propagation delay; Read only memory; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777342

Filename

777342