System analysis of multiple-input multiple-output WLAN receiver

In this paper, we present the analysis of the CMOS receiver of a multiple-in multiple-out WLAN receiver. The analysis is performed for a multi-band direct-conversion receiver architecture, which includes the case-study for different modulation techniques such as 64-QAM and 256-QAM. The overall system parameters are estimated by identifying the blocker profiles and then the individual blocks performances are calculated. Finally, the system requirements are summarized and power levels for the different signals are depicted for different scenarios.