Sub-fF trimmable readout circuit for tri-axes capacitive microaccelerometers

As the sensing capacitances of the recent microaccelerometers become smaller, a precise calibration method is highly required to compensate for the input parasitic capacitance mismatch. This paper presents a sub-fF trimmable readout circuit for capacitive tri-axes microaccelerometer. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to-equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous methods using series-connected capacitors. The readout circuit is implemented in a 0.18 μm 1P4M CMOS process. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and 230 μA, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are 349 μg/√Hz, 341 μg/√Hz and 411 μg/√Hz at 2 kHz bandwidth.