A scalable DAQ system based on the DRS4 waveform digitizing chip

Many current and future experiments require the highest temporal resolution together with large number of channels in the data acquisition system (DAQ) for a minimum cost. The DRS4 waveform digitizing chip allows data sampling at up to 5 Giga-samples per second (GSPS) with high (11.5-bit) amplitude resolution. The domino wave sampling method offers a significant cost and power reduction compared to traditional flash analog-to-digital converters (ADCs). This work presents a new DAQ system based on the DRS4 chip that allows continuous digitization of the analog signals at 120 Mega-samples per second (MSPS) with the possibility to sample a region of interest at rates up to 5 GSPS, thereby allowing long event records with small dead-time in the read-out. Arbitrarily complex trigger logic can be built entirely in the digital domain in the readout field-programmable gate array (FPGA). A Gigabit Ethernet link provides high-speed connectivity from the DAQ board to the backend system. Built-in board-to-board communication and the modular design of the system offer great scalability and flexibility with respect to the number of supported data channels.