DocumentCode :
2954291
Title :
The implementation of MIL STD 1553B processor
Author :
Bai, Yunfeng ; Zhou, Zucheng ; Chen, Junbi
Author_Institution :
Comasic Co. Ltd., Hebei, China
fYear :
1996
fDate :
21-24 Oct 1996
Firstpage :
231
Lastpage :
234
Abstract :
This paper is focused on the MIL STD 1553B protocol and its hardware implementation. MIL STD 1553B is fully called Aircraft internal time Division command/response multiplex data bus. It is used in high noise environments because of its data integrity, it is also widely used in many nonavionic systems. The Chinese military had designated GJB287 X7 standard which is compatible with MIL STD 1553B. A full function of this protocol has been described using Verilog HDL and implemented by XC4000 FPGA chips
Keywords :
application specific integrated circuits; data integrity; digital signal processing chips; field programmable gate arrays; military avionics; military communication; military standards; protocols; pulse code modulation; time division multiplexing; GJB287 X7 standard; MIL STD 1553B processor; MIL STD 1553B protocol; Verilog HDL; XC4000 FPGA chips; hardware implementation; high noise environment; multiplexed data bus architecture; Aerospace engineering; Aircraft propulsion; Cable shielding; Communication cables; Control systems; Hardware design languages; Military aircraft; Protocols; Timing; Working environment noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
Type :
conf
DOI :
10.1109/ICASIC.1996.562795
Filename :
562795
Link To Document :
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