Implementation of the RBF neural chip with the on-line learning back-propagation algorithm

This article presents the hardware implementation of the radial basis function (RBF) neural network whose internal weights are updated in the real-time fashion by the back propagation algorithm. The floating-point processor is designed on a field programmable gate array (FPGA) chip to execute nonlinear functions required in the parallel processing calculation of the back-propagation algorithm. The performance of the on-line learning process of the RBF chip is compared numerically with the results of the RBF neural network learning program written in the MATLAB software under the same condition to check the feasibility of the implemented neural chip. The performance of the designed RBF neural chip is tested for the real-time pattern classification of the nonlinear XOR logic.