An application-specific low power speech processor for cochlear implants

Fully implantable cochlear prostheses are considered as next generation products, in which low power speech processors are very crucial. This paper reports a digital speech processor dedicated to cochlear prostheses. It is a programmable platform and able to carry out all kinds of speech processing algorithms. Several application-specific low power techniques including algorithm optimization, wait mode, operand isolation, clock gating, loop cache and memory partitioning are introduced in the processor design. Implemented using 0.18 ¿m CMOS technology, the processor prototype consumes about 2.3 mW when executing the continuous-interleaved-sampling (CIS) algorithm at a clock frequency of 10 MHz.