• DocumentCode
    2955235
  • Title

    High speed DRAM architecture movement

  • Author

    Inukai, H. ; Ikeda, Hinata

  • Author_Institution
    LSI Memory Oper. Unit, NEC, Kanagawa, Japan
  • fYear
    1998
  • fDate
    11-13 June 1998
  • Firstpage
    76
  • Lastpage
    77
  • Abstract
    Summary form only given. The authors present an overview of the today´s DRAM architecture movements and consideration of future high speed DRAM technologies.
  • Keywords
    DRAM chips; VLSI; high-speed integrated circuits; memory architecture; DRAM architecture; dynamic RAM; high speed DRAM technologies; Bandwidth; Circuits; Graphics; Large scale integration; National electric code; Network servers; Paper technology; Protocols; Random access memory; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-4766-8
  • Type

    conf

  • DOI
    10.1109/VLSIC.1998.688008
  • Filename
    688008
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2955235