DocumentCode
2955504
Title
Importance of on-chip inductance in designing RLC VLSI interconnects
Author
Awwad, Falah R. ; Lammoshi, Tawfeeq ; Nekili, Mohamed
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fYear
2002
fDate
11-13 Dec. 2002
Firstpage
177
Lastpage
180
Abstract
With deeper and faster VLSI technologies, on-chip inductance gained significance in the design of high-speed interconnects. This paper surveys the importance of on-chip inductance, its useful effects and the associated negative drawbacks. It also covers the existing RLC interconnect delay models and optimal repeater insertion methodologies.
Keywords
RLC circuits; delays; inductance measurement; integrated circuit design; integrated circuit interconnections; RLC interconnect; VLSI interconnects; delay models; on-chip inductance; repeater insertion methodologies; Capacitance; Delay; Frequency; Inductance; Integrated circuit interconnections; RLC circuits; Reflection; Repeaters; Rivers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, The 14th International Conference on 2002 - ICM
Print_ISBN
0-7803-7573-4
Type
conf
DOI
10.1109/ICM-02.2002.1161524
Filename
1161524
Link To Document