Design tradeoffs in a 0.5V 65nm CMOS folded cascode OTA

Two folded cascode OTA topologies are designed with low power consumption, tolerable device mismatch, and good performance parameters for 0.5 V supply. The first circuit is a complementary differential to single-ended folded cascode with 34.65 dB gain, 22 MHz unity-gain bandwidth and 62.3 μW power consumption, while the second circuit is a dual-ended folded cascode and common source stage with 64.2 dB gain, 2.1 MHz unity-gain bandwidth, and 150 μW power consumption.