DocumentCode :
2955626
Title :
Impact of design parameters on performance of adaptive Network-on-Chips
Author :
Pratomo, Istas ; Pillement, Sébastien
Author_Institution :
IRISA, Univ. of Rennes 1, Lannion, France
fYear :
2012
fDate :
2-6 July 2012
Firstpage :
724
Lastpage :
725
Abstract :
In current embedded systems the communications infrastructure requires different Quality-of-Services (QoS) depending on the application domain. An adaptive Network-on-Chip (NoC) can adapt dynamically its characteristics to provide QoS requirements and flexible communication. Designing such a NoC is very time consuming. In this paper we evaluate the impact of NoC design parameters on the performances of an adaptive NoCs. The results on latency and throughput were evaluated using the Noxim simulator.
Keywords :
circuit simulation; embedded systems; integrated circuit design; network-on-chip; quality of service; NoC design parameters; Noxim simulator; QoS requirements; adaptive network-on-chip performance; design parameter impact; embedded systems; quality-of-services; Adaptive systems; Channel capacity; Degradation; Hardware; Quality of service; Routing; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing and Simulation (HPCS), 2012 International Conference on
Conference_Location :
Madrid
Print_ISBN :
978-1-4673-2359-8
Type :
conf
DOI :
10.1109/HPCSim.2012.6267003
Filename :
6267003
Link To Document :
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