A precise on-chip voltage generator for a giga-scale DRAM with a negative word-line scheme

Author

Tanaka, Hiroya ; Aoki, Masaki ; Kimura, Shunji ; Sakashita, N. ; Hidaka, Hideto ; Tachibana, Takeshi ; Kimura, K.

Author_Institution

Hitachi ULSI Eng. Corp., Tokyo, Japan

fYear

1998

fDate

11-13 June 1998

Firstpage

94

Lastpage

95

Abstract

We have designed a precise on-chip voltage generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset voltage generator that uses a band-gap generator with a differential amplifier. The noise on a low-voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC voltage error of less than 6% without trimming is also achieved.

Keywords

DRAM chips; ULSI; VLSI; reference circuits; voltage regulators; VBB bouncing; band-gap generator; charge-pump regulator; differential amplifier; giga-scale DRAM; negative word-line scheme; positive/negative offset voltage generator; precision on-chip voltage generator; series-pass regulator; word-line transient; Charge pumps; Differential amplifiers; Fluctuations; Mirrors; Photonic band gap; Random access memory; Regulators; Subthreshold current; Threshold voltage; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-4766-8

Type

conf

DOI

10.1109/VLSIC.1998.688013

Filename

688013