DocumentCode :
2956184
Title :
An Incremental Approach to Functional Diagnosis
Author :
Amati, L. ; Bolchini, C. ; Frigerio, L. ; Salice, F. ; Eklow, B. ; Suvatne, A. ; Brambilla, E. ; Franzoso, F. ; Martin, M.
Author_Institution :
Dip. Elettron. e Inf., Politec. di Milano, Milan, Italy
fYear :
2009
fDate :
7-9 Oct. 2009
Firstpage :
392
Lastpage :
400
Abstract :
This paper presents a methodology for an incremental approach to functional fault diagnosis of complex boards, used to identify candidate failing components based on the results of the executed tests, once a misbehavior has been detected but not localized. The proposal aims at reducing both time and effort during the diagnostic phase, by executing a subset of the available tests, analyzing the achieved results, and then supporting the operator by suggesting what tests should be run next, to identify the faulty component, should the already gathered information be insufficient. A methodology has been defined to analyze the available results, and to evaluate the effectiveness of the remaining tests to find the most probable cause of failure in a reduced number of additional test runs. The approach has been validated on a portion of a real life board and other circuits, to tune parameters and to evaluate the performance of the proposed methodology.
Keywords :
VLSI; fault diagnosis; testing; VLSI systems; candidate failing components; complex hoards; diagnostic phase; faulty component; functional fault diagnosis; tests; Artificial intelligence; Bayesian methods; Circuit testing; Engines; Fault detection; Fault diagnosis; Fault tolerant systems; Life testing; Performance evaluation; System testing; Bayes Network; Fault Diagnosis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
Conference_Location :
Chicago, IL
ISSN :
1550-5774
Print_ISBN :
978-0-7695-3839-6
Type :
conf
DOI :
10.1109/DFT.2009.29
Filename :
5372232
Link To Document :
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