Title :
Complexity Analysis of H.264 Decoder for FPGA Design
Author :
Lindroth, Tuomas ; Avessta, Nastooh ; Teuhola, Jukka ; Seceleanu, Tiberiu
Author_Institution :
Dept. of Inf. Technol., Turku Univ.
Abstract :
A major challenge in the design of any real time system is the proper selection of implementation and platform alternatives. In this paper, a suitable FPGA-based design of the H.264 decoder is presented. Since H.264 standard only specifies the syntax and semantics of the video stream and not the video codec itself, the selection process may be directed based upon the temporal complexity of different parts of the decoder. Here, we present the process flow of these parts using basic algebraic operators. The analysis of the required logic elements to implement the decoder, on various platforms, is presented
Keywords :
code standards; decoding; field programmable gate arrays; real-time systems; video coding; video streaming; FPGA design; H.264 decoder; algebraic operator; field programmable gate array; real time system; temporal complexity; video stream; Decoding; Field programmable gate arrays; Information analysis; Information technology; Laboratories; Logic; Quantization; Streaming media; Video coding; Video compression; H.264 decoder; baseline profile; decoding block;
Conference_Titel :
Multimedia and Expo, 2006 IEEE International Conference on
Conference_Location :
Toronto, Ont.
Print_ISBN :
1-4244-0366-7
Electronic_ISBN :
1-4244-0367-7
DOI :
10.1109/ICME.2006.262765
