DocumentCode
2956440
Title
Optimizing Parametric BIST Using Bio-inspired Computing Algorithms
Author
Nemati, Nastaran ; Simjour, Amirhossein ; Ghofrani, AmirAli ; Navabi, Zainalabedin
Author_Institution
Electr. & Comput. Eng. Dept., Univ. of Tehran, Tehran, Iran
fYear
2009
fDate
7-9 Oct. 2009
Firstpage
268
Lastpage
276
Abstract
Optimizing the BIST configuration based on the characteristics of the design under test is a complicated and challenging work for test engineers. Since this problem has multiple optimization factors, trapping in local optimums is very plausible. Therefore, regular computing algorithms cannot efficiently resolve this problem and utilization of some algorithms is required. In this work, by applying genetic algorithm (GA) and particle swarm optimization (PSO) - which are two well-known bio-inspired computing algorithms -, reconfiguring an optimum parametric BIST is exercised. These methods are applied to configure a parametric BIST for some ISCAS benchmarks, and the efficiency of the resulted configuration is evaluated by means of Verilog HDL procedural language interface (PLI).Using HDL environment along with bio-inspired algorithms, significant advantages over previous works are obtained.
Keywords
VLSI; built-in self test; genetic algorithms; particle swarm optimisation; BIST; ISCAS benchmarks; VLSI; Verilog HDL procedural language interface; bio-inspired computing algorithms; built-in self-test; genetic algorithm; local optimum trapping; multiple optimization factors; particle swarm optimization; Algorithm design and analysis; Biology computing; Built-in self-test; Circuit faults; Computer architecture; Design engineering; Design for testability; Design optimization; Hardware design languages; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
Conference_Location
Chicago, IL
ISSN
1550-5774
Print_ISBN
978-0-7695-3839-6
Type
conf
DOI
10.1109/DFT.2009.55
Filename
5372246
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