Title :
A Study of Side-Channel Effects in Reliability-Enhancing Techniques
Author :
Dai, Jianwei ; Wang, Lei
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT, USA
Abstract :
Reliability-enhancing techniques are critical for nanoscale integrated systems under the pressure of various physical non-idealities such as process variations and manufacturing defects. However, it is unclear how these techniques will affect the side-channel information leaked through hardware implementations. The related side-channel effects may have direct implications to the security requirement in a wide range of applications. In this paper, we investigate this new problem for trusted hardware design. Employing information-theoretic measures, the relationship between reliability enhancements and the induced side-channel effects is quantitatively evaluated. Simulation results on EDC/ECC schemes in memory circuits are presented to demonstrate the application of the proposed method.
Keywords :
error correction codes; integrated circuit reliability; EDC-ECC schemes; error correcting codes; information-theoretic measures; memory circuits; reliability-enhancing techniques; side-channel effects; trusted hardware design; Cryptography; Energy consumption; Error correction codes; Hamming distance; Hardware; Information security; Integrated circuit reliability; Power system modeling; Power system reliability; Robustness;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
978-0-7695-3839-6
DOI :
10.1109/DFT.2009.32
