DocumentCode :
2956760
Title :
Dreams, Plans, and Journey of Reaching Perfect Predictability and Reliability in ASICs
Author :
Sherwani, Naveed
fYear :
2009
fDate :
7-9 Oct. 2009
Firstpage :
123
Lastpage :
123
Abstract :
Abstract form only given. In this talk, the author present the history of predictability and reliability in chip design in general and ASICs in particular. We examine reasons behind both of these important parameters. Then, we discuss one attempt in the last 10 years to solve these problems and results achieve so far.
Keywords :
application specific integrated circuits; integrated circuit design; integrated circuit reliability; application specific integrated circuits; chip design; integrated circuit reliability; perfect predictability; Application specific integrated circuits; Chip scale packaging; Costs; Fault tolerant systems; Field programmable gate arrays; Hardware; History; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
Conference_Location :
Chicago, IL
ISSN :
1550-5774
Print_ISBN :
978-0-7695-3839-6
Type :
conf
DOI :
10.1109/DFT.2009.63
Filename :
5372264
Link To Document :
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