• DocumentCode
    2956885
  • Title

    Challenges in Delay Testing of Integrated Circuits

  • Author

    Walker, D.M.H.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Texas A&M Univ., College Station, TX, USA
  • fYear
    2009
  • fDate
    7-9 Oct. 2009
  • Firstpage
    81
  • Lastpage
    82
  • Abstract
    Delay testing of integrated circuits is increasingly focused on detecting small delay defects, and improving correlation to functional test. In this talk we will describe our recent efforts and results on industrial designs.
  • Keywords
    delays; integrated circuit testing; delay testing; functional test; industrial designs; integrated circuits; small delay defect detection; Automatic test pattern generation; Circuit faults; Circuit testing; Costs; Crosstalk; Delay; Integrated circuit testing; Power dissipation; System testing; Timing; delay test; small delay defects;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • ISSN
    1550-5774
  • Print_ISBN
    978-0-7695-3839-6
  • Type

    conf

  • DOI
    10.1109/DFT.2009.53
  • Filename
    5372271
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2956885