Title :
Testing techniques for embedded memories in ASIC
Author_Institution :
Adaptec Inc., Milpitas, CA, USA
Abstract :
This paper provides a survey of four practical testing techniques for embedded memories in ASIC in industry. The pros and cons of these techniques are studied in terms of area, timing, power, pin count, automation, test speed, test quality and chip testing
Keywords :
application specific integrated circuits; integrated circuit testing; timing; ASIC; area; automation; chip testing; embedded memories; pin count; power; test quality; test speed; testing techniques; timing; Application specific integrated circuits; Asynchronous transfer mode; Automatic testing; Design automation; Internet; Libraries; Multimedia communication; Read-write memory; Registers; Timing;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562831
