Title :
Analog design-for-testability for analog/mixed-signal ASICs
Author_Institution :
Microelectron. CAE Centre, Hangzhou Inst. of Electron. Eng., Zhejiang, China
Abstract :
This paper discusses the concept and issues of Analog Design-for-Testability (ADFT) for analog/mixed-signal ASICs, and describes an algorithm for selecting the accessible nodes for excitation, a scheme for simplifying the ADFT with using of the macro-model circuit instead of the original circuit of the analog macros for including in ASIC chips, an architecture for a practically testable mixed-signal ASIC with using of MUXs and switching networks. Examples are illustrated to demonstrate the necessity of sufficient built-in accessible nodes for observability, the requirement of a few external directly accessible excitation terminals for controllability and the high demand of accuracy of measured test data besides the using of macromodel circuit for completeness in testing
Keywords :
analogue integrated circuits; application specific integrated circuits; design for testability; integrated circuit design; integrated circuit testing; mixed analogue-digital integrated circuits; ADFT; MUX; algorithm; analog design-for-testability; analog/mixed-signal ASIC; architecture; controllability; excitation nodes; macro; macromodel circuit; observability; switching network; Analog circuits; Analog integrated circuits; Application specific integrated circuits; Circuit testing; Design for testability; Digital circuits; Integrated circuit testing; Observability; Packaging; Semiconductor device measurement;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562838