DocumentCode :
2957372
Title :
Power analysis toward ASIC solution
Author :
Huang, May
Author_Institution :
VLSI Technol. Inc., San Jose, CA, USA
fYear :
1996
fDate :
21-24 Oct 1996
Firstpage :
440
Lastpage :
443
Abstract :
Accurate power analysis in the early design cycle can influence design decisions, especially in submicron designs. This paper introduces a research work on the methodology of internal power representation at gate level. The techniques of power analysis discussed in the paper are simulation based. The different approaches of internal power representations supported by EDA tools are also discussed in the paper
Keywords :
application specific integrated circuits; integrated circuit design; network analysis; ASIC; EDA; gate-level power analysis; simulation; submicron design; Analytical models; Application specific integrated circuits; Design automation; Electronic design automation and methodology; Energy consumption; Libraries; MOS devices; Performance analysis; Power dissipation; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
Type :
conf
DOI :
10.1109/ICASIC.1996.562847
Filename :
562847
Link To Document :
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