Title :
Digital neural processor for parallel structure and cost performance comparison of the architectures
Author :
Kim, Jong-moon ; Song, Yoonseon ; Kim, Myung-Won
Author_Institution :
Res. Dept., ETRI, Taejon, South Korea
Abstract :
This paper introduces two processing elements, DNP (Digital Neural Processor)-I and DNP-II, which can be used to construct parallel structures for simulating large scale neural net(NN) models. The processors are designed with a digital VLSI, which consist of a minimum computation circuit for NN emulation including learning and a communication circuit for supporting parallel structures. We also describe cost-performance trade offs by means of area-time(AT) product to compare which processing element is cost-efficient for NN emulation. The DNP-I was implemented in 1991, and the DNP-II is implemented with the VLSI chip of a single-chip multiprocessor having four DNP-II´s. The DNP-II has the performance of maximum 50 MCPS (million connection per second) at 50 MHz, and the neurocomputer (E-MIND/II) having 2D mesh structure of 1024 DNP-II´s accomplishes maximum 40 GCPS (giga connection per second)
Keywords :
VLSI; neural chips; neural net architecture; parallel processing; 2D mesh structure; DNP-I; DNP-II; E-MIND/II; VLSI chip; area-time product; communication circuit; cost/performance trade-offs; digital VLSI; digital neural processor; large-scale neural net model simulation; learning; minimum computation circuit; neural architectures; neural net emulation; neurocomputer; parallel structure; single-chip multiprocessor; Arithmetic; Circuits; Clocks; Computational modeling; Computer architecture; Costs; Emulation; Large-scale systems; Neural networks; Very large scale integration;
Conference_Titel :
Neural Networks, 1995. Proceedings., IEEE International Conference on
Conference_Location :
Perth, WA
Print_ISBN :
0-7803-2768-3
DOI :
10.1109/ICNN.1995.487378
