Delta-Sigma Modulators for Power-Efficient A/D Conversion in High-Speed Wireless Communications

This paper describes how the signal path within a DeltaSigma modulator can be designed, independent of its noise-shaping characteristics, in order to significantly reduce the harmonic distortion due to opamp nonidealities and to lower the power dissipation. This paper then presents architectural approaches for designing high-resolution DeltaSigma modulators at low oversampling ratios (OSRs) and low supply voltages. Thus, analog-to-digital converters (ADCs) can be designed in low-voltage nano-scale digital CMOS technologies to achieve high-speed and high-resolution A/D conversion, with high power efficiency (energy dissipation less than lpj per conversion step). Such DeltaSigma ADCs are attractive for emerging broadband communication applications.