DocumentCode :
2958624
Title :
Statistical characterization of 0.18 μm low-power CMOS process using efficient parameter extraction
Author :
McCarthy, K.G. ; Díaz, E. V Saavedra ; Klaassen, D.B.M. ; Mathewson, A.
Author_Institution :
Nat. Microelectron. Res. Centre, Cork, Ireland
fYear :
1998
fDate :
23-26 Mar 1998
Firstpage :
127
Lastpage :
131
Abstract :
This paper illustrates the use of an efficient parameter extraction strategy for MOS Model 9 to perform a statistical analysis of sample devices from a 0.18 μm CMOS process. The parameter extraction strategy allows all the parameters for a particular device geometry to be extracted from just 50 measurements. These parameters are subsequently used with principal component analysis to provide best-case or worst-case model sets or as inputs to a Monte-Carlo experiment to investigate some of the performance trade-offs of the process
Keywords :
CMOS integrated circuits; Monte Carlo methods; integrated circuit measurement; integrated circuit modelling; integrated circuit yield; statistical analysis; 0.18 micron; CMOS process; MOS Model 9; Monte-Carlo experiment; best-case model sets; device geometry; efficient parameter extraction; efficient parameter extraction strategy; low-power CMOS process; parameter extraction strategy; parameter measurements; performance trade-offs; principal component analysis; sample CMOS devices; statistical analysis; statistical characterization; worst-case model sets; CMOS process; Geometry; Laboratories; Manufacturing processes; Microelectronics; Parameter extraction; Performance evaluation; Semiconductor device modeling; Statistical analysis; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1998. ICMTS 1998., Proceedings of the 1998 International Conference on
Conference_Location :
Kanazawa
Print_ISBN :
0-7803-4348-4
Type :
conf
DOI :
10.1109/ICMTS.1998.688055
Filename :
688055
Link To Document :
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