DocumentCode :
2958695
Title :
Sub-1V Oguey´s Current Reference Without Resistance
Author :
Guigues, Fabrice ; Kussener, Edith ; Malherbe, Alexandre ; Duval, Benjamin
Author_Institution :
L2MP-UMR CNRS, Toulon
fYear :
2006
fDate :
10-13 Dec. 2006
Firstpage :
288
Lastpage :
291
Abstract :
The circuit proposed in this paper allows to generate a sub-1V 50 nA current reference. By changing the inversion mode of two transistors, the original Oguey´s structure becomes compliant with ultra low voltage requirements, while preserving the topology inherent simplicity, guarantee of low cost. Furthermore, the use of EKV2.0 MOS model involves an inversion level free study. As a consequence, supply voltage and/or silicon area can be optimized unambiguously in regards to current target and technology. Simulation with a higher than 500 mV Vt technology, for an inversion level of only 2.78, gives a minimum supply voltage of 710 mV.
Keywords :
MOS integrated circuits; low-power electronics; network topology; reference circuits; MOS; Oguey current reference; current 50 nA; topology; transistors; voltage 500 mV; voltage 710 mV; Analog circuits; Analytical models; Circuit simulation; Circuit topology; Costs; Equations; Low voltage; MOSFET circuits; Resistors; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
Type :
conf
DOI :
10.1109/ICECS.2006.379782
Filename :
4263360
Link To Document :
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