DocumentCode :
2959141
Title :
Limits to a Correct Evaluation in RTD-based Ternary Inverters
Author :
Núñez, Juan ; Quintana, José M. ; Avedillo, María J.
Author_Institution :
Inst. of Microelectron. of Seville, Sevilla
fYear :
2006
fDate :
10-13 Dec. 2006
Firstpage :
403
Lastpage :
406
Abstract :
Multiple-valued logic (MVL) circuits are one of the most attractive applications of the monostable-to-multistable transition logic (MML), and they are on the basis of advanced circuits for communications. However, a correct DC evaluation is not inherent to the usual MML circuit topologies. This paper analyses the case of an MML ternary inverter, and determines the relations that circuit representative parameters must verify to obtain a correct operation.
Keywords :
high electron mobility transistors; logic gates; multivalued logic circuits; resonant tunnelling diodes; semiconductor device testing; HFET; MML ternary inverter; RTD-based ternary inverters; circuit representative parameters; monostable-to-multistable transition logic; multiple-valued logic circuits; resonant tunneling diodes; Circuit topology; Driver circuits; HEMTs; III-V semiconductor materials; Inverters; Logic circuits; MODFETs; Resonant tunneling devices; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
Type :
conf
DOI :
10.1109/ICECS.2006.379810
Filename :
4263388
Link To Document :
بازگشت