DocumentCode
2959287
Title
Efficient validity checking for processor verification
Author
Jones, R.B. ; Dill, D.L. ; Burch, J.R.
Author_Institution
Comput. Syst. Lab., Stanford Univ., CA, USA
fYear
1995
fDate
5-9 Nov. 1995
Firstpage
2
Lastpage
6
Abstract
We describe an efficient validity checker for the quantifier-free logic of equality with uninterpreted functions. This logic is well suited for verifying microprocessor control circuitry since it allows the abstraction of datapath values and operations. Our validity checker uses special data structures to speed up case splitting, and powerful heuristics to reduce the number of case splits needed. In addition, we present experimental results and show that this implementation has enabled the automatic verification of an actual high-level microprocessor description.
Keywords
data structures; digital simulation; microprocessor chips; automatic verification; data structures; datapath values; high-level microprocessor description; microprocessor control circuitry verification; processor verification; quantifier-free logic; uninterpreted functions; validity checker; validity checking; Automatic control; Boolean functions; Circuits; Costs; Data structures; Design engineering; Laboratories; Logic; Microprocessors; Modems;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
ISSN
1092-3152
Print_ISBN
0-8186-8200-0
Type
conf
DOI
10.1109/ICCAD.1995.479877
Filename
479877
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