An internodal switching technique for high speed packet networks

The evolution of transmission facilities has contributed to the availability of large bandwidth. As a result, researchers are looking into new VLSI devices to speed up processing. However, as the VLSI technology advances, the transmission technology would break the current limits. In essence, it will turn out that protocol processing could be one of the bottlenecks in high-speed networks. This problem creates the need for design techniques which require low overheads and fast processing for switching and rerouting. Several commonly used switching techniques are discussed. An internodal switching scheme that consumes very little network resources is presented, and its possible flow and congestion controls are discussed