A hardware-oriented learning algorithm for a digital spiking neuron

The digital spiking neuron is a wired system of shift registers and behaves like a simplified neuron model. By adjusting the wirings among the registers, the neuron can generate various spike-trains. In this paper some basic relations between the wiring pattern and spike-train characteristics are analyzed. Based on the analysis results, a hardware-oriented learning algorithm is proposed. The learning algorithm and the digital neuron are implemented by a hardware description language (HDL). It is shown that the learning algorithm enables the digital neuron to approximate various spike-trains generated by an analog spiking neuron model. In addition, some basic experimental measurements are provided by using a field programmable gate array (FPGA).