A mixed-signal IC for a semi-implantable hearing aid

Author

Amantia, P.J. ; Kane, M.J. ; Kimball, E.A. ; Garverick, S.L.

Author_Institution

Case Western Reserve Univ., Cleveland, OH, USA

Volume

1

fYear

1999

fDate

36342

Firstpage

186

Abstract

A Hearing Aid Chip (HAC3) used in an RF-based, 2 component semi-implantable middle ear hearing device is described. The HAC3 uses a programmable gain amplifier, 2nd-order Σ-Δ modulator, pulse-width modulator, and class E output stage to accept an incoming audio signal and modulate it for transmission to an implanted passive receiver. The HAC3 employs a unique bias control scheme to improve signal-to-noise characteristics and reduce power consumption. The HAC3 was fabricated using a conventional 2.0 μm CMOS process. The circuit functions as expected and test results characterizing HAC3 signal-to-noise and power conserving behavior are presented

Keywords

CMOS integrated circuits; gain control; hearing aids; integrated circuit noise; low-power electronics; mixed analogue-digital integrated circuits; pulse width modulation; sigma-delta modulation; 2 micron; 2nd-order Σ-Δ modulator; CMOS process; HAC3; PWM; RF-based device; SNR improvement; bias control scheme; class E output stage; hearing aid chip; implanted passive receiver; middle ear hearing device; mixed-signal IC; power conservation behavior; programmable gain amplifier; pulse-width modulator; semi-implantable hearing aid; sigma-delta modulator; signal-to-noise characteristics; Auditory system; Digital control; Ear; Electronics packaging; Magnetic flux; Modulation coding; Pulse amplifiers; Pulse modulation; Pulse width modulation; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5471-0

Type

conf

DOI

10.1109/ISCAS.1999.777834

Filename

777834